Garrett.
I build chips.
A computer engineer with a passion for chip design. I love low-level software and high-level hardware, especially whenever the two intersect.
Hi, my name is
Projects
Layout
Digital IC
Computer Architecture
Mini TPU
Custom mini-TPU to perform matrix multiplication, loosely based off the original Google TPU architecture.
Massive digital design with over 70,000 transistors, all done with manual layout and no standard cell libraries.
SystemVerilog
RTL
Computer Architecture
RISCV Processor
A multicycle, pipelined RISCV processor built using SystemVerilog.
Implements a cache with the Arm AXI4-Lite protocol for data and instruction memory.
VLSI
Digital IC
Cadence
Memory
SRAM Core
A 64-bit SRAM core built and tested using Cadence.
Peripheral circuits include a two-phase clock, bit prechargers, row and column decoders, and I/O data bus registers.
Embedded Systems
Bare Metal C
Low Level Graphics
Music Transposer
Embedded systems project that takes in an input melody and outputs the same melody with a number of half-step shifts determined by the user.
Includes an LCD screen that displays the shifted note. Programmed with bare metal C on the ATMega328PB.
Analog IC
PCB Layout
Soldering
SPICE
Metal Detector
A custom metal detector using a PCB that I routed (not my best work), soldered (when I paid for my mistakes), and tuned myself.
Design uses two oscillators, a mixer, several CS Amps, a CG Amp, and a CD Amp for output.
VLSI
Digital IC
SPICE
8-Bit Ripple-Carry Adder
An 8b RCA designed from scratch using VLSI tools and simulated using Ngspice. Tested for correctness and optimized for performance.
Experience
May 2025 - present
Research Assistant
CyberSavvy
Setting up cloud communication between FPGAs for easy deployment and updates.
Extensive use of Docker and Kubernetes to containerize and manage applications.
Setting up systems such as NFS servers, QEMU VMs, and Tio device monitors.
May 2024 - Aug 2024
Quality Assurance and Developer Relations Intern
Pieces for Developers
Testing for bugs in new releases and focusing heavily on the
power-user experience. Identified several critical
bugs and helped polish the app in preparation for a paid model.
Aug 2024 - Dec 2024
Teaching Assistant
UPenn - SEAS
Held recitations and office hours for CIS 2400 Intro to Computer Systems,
a bottom-up course covering transistors, logic gates, boolean algebra, assembly, and C.
Created an additional conceptual office hours that I taught during the weekend.
Aug 2024 - present
Residential Advisor
UPenn - CHAS
Hold events for my residents every month under a strict budget. “On call” for several days in the semester - basically, if anything happens
I am called in to document the event and report it to my supervisor.
Education
2025 - 2027
MSE in Electrical Engineering
University of Pennsylvania, School of Engineering and Applied Sciences
2023 - 2027
BSE in Computer Engineering
University of Pennsylvania, School of Engineering and Applied Sciences
Extracurriculars
- Penn Latin and Ballroom Dance
2019-2023
High School
Walnut Hills High School
Extracurriculars
- Varsity tennis player for 2 years.
- Flutist for the school band for several years (as well as solo work).
- Volunteer math tutor for local 8th graders.